The present invention relates to display units for producing onscreen displays and the like.
Modern video products frequently utilize on-screen displays to provide information and control feedback to the user. Earlier, more primitive on screen displays took the form of text overlying a single-color background, or in some cases text overlying real-time video. More recently, richer on-screen display environments have been generated, having overlapping windows, icons, and a two-dimensionally movable cursor permitting the user to browse through possible options. These richer on-screen display environments are more intuitive to the user and often can supply more information in a more clear fashion than earlier text-based displays.
Unfortunately, there is a penalty associated with producing rich on-screen display environments; specifically, the complexity of the hardware needed to support such displays is substantial. Typically a graphic display is produced by providing to hardware a palette of luminance and/or color values and a bit map of values for each pixel in a region of the display. The values are used to look up luminance and color values for each pixel and display the pixel on the screen. To achieve a reasonable color depth necessary for pleasing icons, the size of the palette may become quite large, and as a result, consume substantial storage space. Furthermore, to display different icons or different graphics in different areas of the display, different palettes may be required.
One approach to designing display hardware, is to provide a predetermined number of parallel display engines, each responsible for producing one of the items displayed on the screen, and thus having its own buffer for storing pixel values, and its own palette. The outputs of these parallel display engines can then be merged together, and if there is an overlap between two items, the conflict may be resolved by a prioritization.
This approach has the advantage of complete flexibility; however, this flexibility comes at a substantial hardware cost, since the display hardware must include multiple complete parallel display engines.
A second approach to designing a display hardware, is to provide a single display engine, reloading this engine with new pixel values and a new palette for each area to be displayed on the screen. This approach has the advantage of simplicity; however, this simplicity comes at a cost of flexibility. Specifically, since the display engine will take a finite time to reload with new pixel values and a new palette, there will be limits to how multiple display windows can be placed on the screen. For example, multiple display windows likely could not lie in the same row since pixels are output on a row-by-row basis in real-time, and the presence of two windows in the same row would require that the display engine generate data for two different windows in real time. Furthermore, there likely will be a minimum number of rows between two display windows, to permit sufficient time for the display engine to re-initialize after displaying a first window and before beginning display of a second window. As a practical matter, these limitations may require that an entire on-screen display be generated in a single window using a single palette, which would make manipulation of the on-screen display more complex as compared to permitting multiple display windows that can be separately manipulated.
Thus, there is a need for a display hardware that has a relatively low hardware complexity yet provides substantial flexibility in defining displays.
In accordance with principles of the present invention, this need is met by display hardware which manages a plurality, e.g. three, potentially overlapping display windows each having its own pixel values and potentially having its own palette, with no limitation as to the position of the windows relative to each other. This capability is provided at a reduced hardware complexity as compared to a parallel hardware approach, by arranging substantial portions of the hardware in a multiplexed fashion so that, for example, the same hardware handles the lookup of palette entries for pixel values, regardless of the currently active window. The hardware is arranged so that it may switch in real time from processing data for one window to processing data for another window, whenever the current display coordinate crosses a window boundary.
More specifically, in accordance with one aspect, the invention features a display unit for generating a display of a plurality of overlapping windows, with each window having a priority for display and defined by pixels each having a color and luminance value. The display unit has a plurality of buffers, each buffer storing pixel values for one of the overlapping windows. The buffers output pixel value signals for the current display coordinate. An area detector and prioritizer responds to a current display coordinate and determines a highest priority window that has a pixel value for the current display coordinate, and generates an active window signal identifying the highest priority window. A multiplexer receives the pixel value signals from the buffers and, and based on the active window signal, selects one of the buffer output signals for processing. The selected buffer output signal forms the basis for determining color and luminance values for the pixel at the current display coordinate, using common processing circuitry. Thus, while multiple overlapping windows can be managed by the display unit, there is no redundancy in the display unit circuitry other than in the buffers themselves.
In the disclosed particular embodiment, there is a selector circuit that receives the multiplexer output and selects appropriate bits therefrom representing a pixel value at a current display coordinate. The selector is controlled by a position signal. The position signal is generated by a clock/position circuit, based on a number of bits used to represent a pixel in each of the overlapping windows, and signals indicating whether the current display coordinate is inside of each respective windows.
In this embodiment, the clock/position circuit comprises multiple individual window clock/position circuits, one for each window, each comprising a counter which increments each time a current display coordinate is changed, and is enabled only when a current display coordinate is in the window, a multiplexer responsive to the a number of bits used to represent a pixel in the window, which selects a subset of the bits output from the counter to generate a position signal, and a carry detection circuit responsive which generates a consume signal to a buffer when there is a carry into selected bit of the counter. This consume signal causes the buffer to advance to a next word of new pixel value signals, thus consuming pixels in the buffer.
This embodiment uses the pixel value signals produced from the buffers to form addresses into a palette memory, where each location in the palette memory identifies a luminance and/or color value. The palette memory address is formed from the pixel value signal produced by the selector, and an identifier of a palette for the active window. Specifically, an address is generated by combining lower order bits of the selector output signal with upper order bits selected either from the identifier of the palette for the active window, or the higher order bits of the selector output signal, based on the number of bits used to represent a pixel in the active window.
The locations in the palette used in this embodiment also specify a blend value, delivered along with a luminance and/or color value when an address is delivered to the palette. A blend value is used by a blender to blend the luminance and/or color value from the palette memory (reformatted in an appropriate manner to facilitate blending), with a background luminance or color at a ratio responsive to the blend value. To create this blend value, the local blend value obtained from the palette memory is combined with a global blend value for the entire active window, to produce a blend value used by the blender.
In the disclosed embodiment, the area detector and prioritizer generates in window signals respectively indicating whether a current display coordinate is inside of a respective one of said plurality of overlapping windows without regard to priority, by comparing the row and column of the current display coordinate to the row and column limits of the window. These in window signals are used by the clock/position circuit to consume pixel values in the buffers, as described above
In this embodiment, the area detector and prioritizer also determines whether the current display coordinate is in a display area of each window, by comparing the row and column of the current display coordinate to the row and column limits of the display area. A window may only be active if the current display coordinate is in the window and in the display area. A priority encoder in the area detector and prioritizer determines which of possibly several potentially active windows has the highest priority, and generates the active window signal by identifying the highest priority active window.
The disclosed embodiment also includes a masking rectangle generator, which can generates a plurality of overlapping masking rectangles, each rectangle having a priority for display, and fixed color and luminance and blend values. In the masking rectangle generator, a rectangle area detector and prioritizer uses the current display coordinate, and row and column limits and priorities of the masking rectangles, to determine a highest priority rectangle at the current display coordinate. Multiplexers the select the color and luminance and blend value for the highest priority rectangle.
To form a complete on-screen display, the rectangle data is blended with background video, and then the window data is blended with the result, to achieve a rich, layered display of on-screen information.